As projection display screens become larger, uneven luminance in each red, green, and blue color (hereafter referred to as R, G, B) and color impurity in the combinations of R, G, B occur because of i) deviation in the characteristics of the light source and video display elements, ii) light reduction at the periphery of the projection lens, and iii) projection angles subtending to the screen. Accordingly, the need has increased to incorporate circuits for correcting uneven luminance and color impurity. One example is disclosed in Japanese Laid-open Patent A61-243495.
An example of the prior art is explained with reference to FIG. 4.
The video signal input from a video signal input terminal 41 is converted to R, G, B video signals by a signal processor 48. An adder 49 adds a correction signal (described later) to the R, G, B video signals. After the correction signal is added, the R, G, B video signals pass through a drive circuit 50 and are output at video output terminal 51 to drive the video display element (not illustrated) thereby projecting the video image on the screen (not illustrated).
To generate the correction signal, the video signal with a specified amplitude is input to the video input terminal 41. A video image is expected to be displayed on the screen at a uniform luminance level by employing this video signal with a specified amplitude. However, because of the aforementioned reasons, the luminance level on the screen may not be uniform in some cases.
Correction data for maintaining a uniform luminance level on the screen is therefore created as follows.
A projection screen is divided into squares. The luminance level of the video image in each divided square on the screen is measured using a video camera. The difference between the measured luminance level and a specified luminance level is stored in a memory 46 as correction data for each divided area.
The video signal input to the video signal input terminal 41 is also input to a synchronizing separator 42. The synchronizing separator 42 outputs a horizontal synchronizing signal H and a vertical synchronizing signal V. The horizontal synchronizing signal H is input to a phase synchronizing circuit 43. The phase synchronizing circuit 43 produces a horizontal synchronizing clock signal CLK in accordance with the horizontal synchronizing signal H to an address counter 45. At the same time, the synchronizing separator 42 also outputs the vertical synchronizing signal V to the address counter 45.
In practical operation, for reading the correction data previously stored in the memory 46, the horizontal synchronizing clock signal CLK and the vertical synchronizing signal V control the address counter 45 for calculating an address in the memory 46 corresponding to each divided area made at creating the correction data.
A D/A converter 47 converts the correction data read from the memory 46 into an analog correction signal. This analog correction signal is input to the adder 49.
As mentioned above, unevenness in the luminance or color of the video image displayed on the screen is corrected by adding the correction signal to the input video signal at the adder 49 and driving the video display element through the driver 50.
However, since unevenness of the luminance or color of the video image is corrected for each divided area, a gap in correction between the correction data for each area may be obvious.
The gap in horizontal direction can be smoothed relatively easily by the use of a low pass filter. However, for smoothing the gap in vertical direction, an expensive circuit such as a field memory may be required. Consequently, smoothing in the vertical direction is not always easy in the prior art.